Semiconductor device performance improvements are largely achieved by reducing device dimensions, a development that has, at the same time, resulted in considerable increases in device density and device complexity. In a wafer level chip scale package (WLCSP) technology, the semiconductor chip is packaged directly on the wafer level after the semiconductor chips are finished completely on the wafer following by the separation of individual chip packages from the wafer. As a result, the size of the chip package is almost equal to the size of the original semiconductor chip. WLCSP has been widely used for mobile phone applications, such as analog, wireless connectivity, CMOS image sensors, and others. Especially, WLCSP is increasingly used to package wireless basebands or RF transceiver resulting in sizes larger than 5×5 mm2. The key components of a WLCSP for flip-chip bonding are redistribution layer (RDL), under bump metallurgy (UBM), and bumps such as solder bumps or metal posts. Among which solder bumps are used to access the devices, also referred to as Input/Output (I/O) structures of the device.
This has led to new methods of packaging semiconductor devices whereby structures such as Ball Grid Array (BGA) devices and Column Grid Array (CGA) devices have been developed. A BGA includes an array of bumps of solder that are affixed to pins on the bottom of an integrated circuit (IC) package for electrically connecting the IC package to a printed circuit board (PCB). The IC package may then be placed on the PCB, which has copper conductive pads in a pattern that matches the array of solder bumps on the IC package. The solder bumps may be heated to cause the solder bumps to melt. When the solder cools and solidifies, the hardened solder mechanically attaches the IC package to the PCB.
BGA's are known with 40, 50 and 60 mil spacing. Due to the increased device miniaturization, the impact that device interconnects have on device performance and device cost has also become a larger factor in package development.